Обновления для Cadence SPB/OrCAD 16.50.022 - 16.50.023.
Год/Дата Выпуска: 2012 Версия: SPB16.50 Build 022, 023 Разработчик: Cadence Разрядность: 32bit Совместимость с Win7: да Системные требования: Установленный пакет Cadence SPB/OrCAD 16.50.000 - 16.50.022 Язык интерфейса: Английский Размер: 1.3 Гб
Для установки последнего обновления, не надо устанавливать все, достаточно скачать и установить последнее. Но в прошлых версиях SPB бывало, что после обновления появляются "свежие" глюки, тогда попробуйте установить предыдущее.
Как сделать: Не делайте Hotfix поверх пропатченной SPB, работать не будет. На примере: Был каталог d:\CAD\SPB_16.50\ с установленной пропатченной версией. Переименовываем d:\CAD\SPB_16.50\ в d:\CAD\SPB_16.50=\ Создаём пустой d:\CAD\SPB_16.50\ Копируем d:\CAD\SPB_16.50=\compnts.dat в d:\CAD\SPB_16.50\ Делаем Hotfix. Делаем патч от SPB_16.50.000 (достаточно сделать для d:\CAD\SPB_16.5\tools, остальное в Hotfix не обновлялось) Переносим содержимое d:\CAD\SPB_16.50\ в d:\CAD\SPB_16.50=\ с заменой Переименовываем d:\CAD\SPB_16.50=\ в d:\CAD\SPB_16.50
Доработки в версии: DATE: 05-30-2012 HOTFIX VERSION: 023 CCRID PRODUCT PRODUCTLEVEL2 TITLE 995566 ALLEGRO_EDITOR REPORTS Drill data file qty not matching drill chart 999003 LAYOUT TRANSLATORS L2A leaves unconnected nets and improper voids on vias 1008451 LAYOUT TRANSLATORS The brd file translated using L2A Translator is loosing the diameter of the copper area attached to the pin. 1010374 LAYOUT TRANSLATORS Layout MAX file is not getting converted to OrCAD Peformance correctly 1012375 ALLEGRO_EDITOR PARTITION Route Keepout in All subclass shape in .dpf cannot be imported back to master board. 1012522 ALLEGRO_EDITOR OTHER Allegro crashes during Import > Logic > Deisgn HDL and creates a .SAV file. 1012765 ALLEGRO_EDITOR EDIT_ETCH Allegro crash 1012934 CONCEPT_HDL CONSTRAINT_MGR Backannotation destroys matchgroups in replicated blocks in customer design 1012951 CONCEPT_HDL CORE Text justification corrupted on symbol mirror 1013030 SIG_INTEGRITY SIGNOISE PCB SI crashes when running bus simulations 1013519 APD GRAPHICS The layer selection in the Visibility Form slows down after selecting "Nets" in the Color Dialog. 1013853 CONSTRAINT_MGR OTHER Override constraints not working 1013942 APD COLOR Assign color is inconsistently assigning colors to the clines but not the vias. 1014402 CONCEPT_HDL CORE DE HDL crashes while saving some pages 1014757 SIG_INTEGRITY GEOMETRY_EXTRACT Huge Difference in Differential Impedance values in Cross Section between Bem2d and Ems2d Field Solver. 1014956 SIP_LAYOUT DIE_EDITOR die editor pin move and add commands put things on the half grid and not on the grid as expected
DATE: 05-18-2012 HOTFIX VERSION: 022 CCRID PRODUCT PRODUCTLEVEL2 TITLE 686560 CAPTURE BACKANNOTATE Changing pin group property after pin swap resets pin numbers 740162 ALLEGRO_EDITOR EDIT_ETCH Enhance Allegro PCB Editor use model when adding NULL net copper 963645 PSPICE MODELEDITOR Model import wizard crashes while associating IRF150 to schematic symbol. 966422 CAPTURE PROPERTY_EDITOR References changes, done in the property editor, lost on closing and reopening the design 968674 PSPICE PROBE Display Measurement evaluation does not show Measurement and its value directly. 970281 CAPTURE ANNOTATE Annotation assigns wrong refdes to resistor. 975497 CAPTURE NETLIST_OTHER Capture crashes while trying to generate other format netlist 993129 CONCEPT_HDL CONSTRAINT_MGR unable to select multiple nets in schematic and highlighted them in CM 997518 PSPICE PROBE Mouse click on probe window is required to see Plots after simulation for multiple plots on win 7 999603 CAPTURE NETGROUPS Capture crashes on trying to rename a netgroup member. 1001167 SIG_INTEGRITY GEOMETRY_EXTRACT Need warning message of DC shape check. 1002370 ALLEGRO_EDITOR SKILL Allegro axlMeterIsCancelled function not always returning t when Stop button is selected. 1003205 APD DATABASE Fillet gone after DB doctor check 1003447 SIP_LAYOUT DIE_EDITOR Rounding errors are causing problems for shrunk dies with .001 u mfg grid 1003821 ALLEGRO_EDITOR EDIT_ETCH Diff pair routing starts from unexpacted pin for non control cline 1005793 ALLEGRO_EDITOR DRC_CONSTR Update DRC with Multi-thread DRC changes DRC without any change in design for Win 7 OS 1005835 ALLEGRO_EDITOR OTHER Display Status fails to show rats on missing connection point 1006701 ALLEGRO_EDITOR SHAPE Shape to shape void incorrect spacing value in L3 layer. 1006718 CONSTRAINT_MGR OTHER Allegro crashes while sliding nets having custom formula in CMGR 1006920 CONCEPT_HDL CORE Global Navigate hangs schematic 1007102 CAPTURE OTHER Latest release on START page is not getting updated 1008585 ALLEGRO_EDITOR MANUFACT Manufacturing X Section Chart layer is not coming up correctly in this design 1009047 F2B PACKAGERXL Packager crashes after installing ISR s19 1009443 ALLEGRO_EDITOR DRAFTING Pressing TAB key in Dimension environment results error: E- (SPMHA2-65): Error -3000314. 1009562 CAPTURE TCL_INTERFACE Library correction TCL utility is failiing to correct the corrupt libraries. 1009941 SIP_LAYOUT DIE_ABSTRACT_IF Distributed DIE abstract generated from Virtuoso VSiP Architect has errors on Shapes used in Area xfer 1010201 ALLEGRO_EDITOR INTERACTIV dbdoctor on psm file returns error in open drawing 1010432 ALLEGRO_EDITOR SYMBOL Error in placing Pin in Symbol editor, "W- (SPMHDB-226): Inconsistent rotation data." 1010512 ALLEGRO_EDITOR DRC_CONSTR Can not check short pin in DRC 1010611 MODEL_INTEGRIT TRANSLATION Translation failed due to IBIS2DML errors. 1011022 ALLEGRO_EDITOR OTHER Create Fanout crashes allegro if dimension is visible.
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